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Altera_Forum
Honored Contributor I
700 Views

About RapidIO on ArriaII devkit

I have two ArriaII devkits, and the kits communicate with each other by rapidio(1.25Gbps). But I found the rapidio core on both kits are not initialized. The PORT_UNIT register's bit was always asserted.  

 

Can anybody can give me some suggestion? Thank you!
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Altera_Forum
Honored Contributor I
31 Views

The kits use different project base on SOPC. One is operated by niosii, the other is operated by pcie bridge.  

I found that the PORT_UNIT register's bit would be deasserted when the two kit use the same project.
Altera_Forum
Honored Contributor I
31 Views

It works now! Because the rate is different from each other. Sometimes the baudrate you set in sopc megacore isn't the same as the rate in "Configure Transceiver ...", we should confirm both of them.

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