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Altera_Forum

Honored Contributor I

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10-21-2010
07:09 AM

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Calculating speed of DDR2-RAM using DDR2-HPC

Hello,

i've got a question about calculating speed of DDR2-RAM using DDR2-HPC from Altera. I'm using CycloneIII-Dev-Board and know, that the maximum theoretical speed of DDR2 is: 167 MHz * 72 bits * 2 (Both clock edge used) ~= 24Gbps Ok, but whats about the DDR2-HPC? How do I calculate it's influence in speed? How fast is this component? In the datasheet (http://www.altera.com/literature/hb/external-memory/emi_ddr_ug.pdf) at page 160 they mention, that there is a total read latency of 108ns and a total write latency of 66ns. Does it mean, that one read operation takes 108ns? And then, after waiting 108ns the next read operation could start? This would slow the effective speed of using DDR2 down vastly, wouldn't it? Or what did I get wrong? Thanks for every hint!Link Copied

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Altera_Forum

Honored Contributor I

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10-21-2010
12:51 PM

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Altera_Forum

Honored Contributor I

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10-21-2010
10:24 PM

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Latency is not the same as efficiency.

Your commands are pipelined so best case you could get close to 24Gbps but when the DDR2 needs to do a refresh and you're stuck waiting. So the overall speed or efficiency comes down to what read/write ratios and patterns you are using and what addressing patterns you are accessing (sequential or random?). Its a fairly complex calculation and I am not sure Altera can provide an exact answer for your system. I'd perhaps look more at a memory vendor for this sort of information.For more complete information about compiler optimizations, see our Optimization Notice.