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Agilex "support logic" gives failed synthesis rules with medium severity

alexislms
Valued Contributor I
224 Views

The Agilex's support logic gives failed synthesis rules with medium severity.

alexislms_1-1657699808715.png

 

RES-30133 - Embedded Memory Blocks with Initialized Content That Might be Modified Before the FPGA Enters User Mode

 

agilex_xcvr__tiles|z1577a_x0_y0_n0__reset_controller|x_f_tile_soft_reset_ctlr_sip_v1|x_ftile_reset|rst_ctrl|nios0|nsm|regfile_b|auto_generated|altera_syncram_impl1|lutram*
agilex_xcvr__tiles|z1577a_x0_y0_n0__reset_controller|x_f_tile_soft_reset_ctlr_sip_v1|x_ftile_reset|rst_ctrl|nios0|nsm|scr_ram|auto_generated|altera_syncram_impl1|ram_block*
agilex_xcvr__tiles|z1577a_x0_y0_n0__reset_controller|x_f_tile_soft_reset_ctlr_sip_v1|x_ftile_reset|rst_ctrl|nios0|nsm|regfile_a|auto_generated|altera_syncram_impl1|lutram*
agilex_xcvr__tiles|z1577a_x0_y0_n0__reset_controller|x_f_tile_soft_reset_ctlr_sip_v1|x_ftile_reset|altera_syncram_component|auto_generated|altera_syncram_impl1|ram_block*

 

RES-30132 - Registers May Not Be Properly Reset

 

agilex_xcvr__tiles|z1577a_x0_y0_n0__reset_controller|x_f_tile_soft_reset_ctlr_sip_v1|divided_osc_clk

 

 

Regards,

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1 Solution
ShengN_Intel
Employee
189 Views

Hi,

 

Below are the messages from internal:

This is a false warning. It has been reported multiple times already. We are working with the Design Assistant team to suppress it, but we are not going to change the SRC to try to remove it.

I am working with the Design Assistant team to provide a way to disable this error in the SRC RTL. Right now, this cannot be done.

 

Check the attached picture. Can just ignore them for now.

 

Thanks,

Best regards,

Sheng

 

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1 Reply
ShengN_Intel
Employee
190 Views

Hi,

 

Below are the messages from internal:

This is a false warning. It has been reported multiple times already. We are working with the Design Assistant team to suppress it, but we are not going to change the SRC to try to remove it.

I am working with the Design Assistant team to provide a way to disable this error in the SRC RTL. Right now, this cannot be done.

 

Check the attached picture. Can just ignore them for now.

 

Thanks,

Best regards,

Sheng

 

Reply