FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6020 Discussions

Aligning the SOMF output from the JESD MC core with the input SYSREF

Altera_Forum
Honored Contributor II
781 Views

Hi , 

 

I would like to align the SOMF signal coming out of the JESD Megacore with respect to SYSREF signal. What sequence of configuration register write should I do to make this alignment. Based on register map link If I configure syncn_sysref_ctrl register I could make this SOMF SYSREF alignment possible. I tried enabling either single SYSREF detection or continuous SYSREF detection mode. The SOMF alignment with SYSREF does not happen. What am I missing?? 

 

Thanks in advance
0 Kudos
0 Replies
Reply