FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5987 Discussions

Aligning the SOMF output from the JESD MC core with the input SYSREF

Honored Contributor II

Hi , 


I would like to align the SOMF signal coming out of the JESD Megacore with respect to SYSREF signal. What sequence of configuration register write should I do to make this alignment. Based on register map link If I configure syncn_sysref_ctrl register I could make this SOMF SYSREF alignment possible. I tried enabling either single SYSREF detection or continuous SYSREF detection mode. The SOMF alignment with SYSREF does not happen. What am I missing?? 


Thanks in advance
0 Kudos
0 Replies