Altdq_dqs2

Altera_Forum · ‎03-25-2014

Hello Everyone,

We are using Arria V GX and the IP ALTDQ_DQS2 with dynamic configuration scan chain. Unfortunately, we cannot complete to compile our design as error occurs.

The error messages are as follows:

Error (129015): Output port RDEN on atom "altdq_dqs2_acv_arriav:altdq_dqs2_inst|lfifo", which is a arriav_lfifo primitive, is not legally connected and/or configure.
“Info (129016): Output port RDEN is disconnected, but the Compiler expects this output port to be connected”.

We confirmed output port was connected to DQs. So, we do not understand the root cause.

Please help!

Best Wishes

Altera_Forum · ‎07-14-2015

Hi Hisa,

I am having the exact same error in my design too. Have you found any solution to this issue ?

regards

waqas

Altera_Forum · ‎07-24-2015

Hello Waqas,

Have you been able to solve this issue?

If yes, could you let us know how did you solve it?

If not, is it possible to share your design? You can remove confidential blocks from it if any. I am just interested in files generated by Quartus for DQ_DQS2 megafunction and connections you have made to it.

Cheers,

Bhaumik

Altera_Forum · ‎07-24-2015

Hi All,

I was going to post my solution soon but was too busy. So,

Yes I was able to solve the issue. The problem was that since i was only using the Dq_dqs2_bidir IP to write data out so i was not using the Read_data_out lines coming to the core from dq_dqs2 IP.

So i added the following code to use the read_data lines and the error "RDEN not legally connected or configured" was not occuring anymore.

process(core_clk)

begin

if(rising_edge(core_clk) ) then

read_datacore <= read_data_out;

end if;

end process;

Hope it solves your problem too :)

Best regards

waqas

Altera_Forum · ‎07-25-2015

Hi Waqas,

Thank you for sharing solution.

Cheers,

Bhaumik