I am designing a system which contains a main module, and several sub-modules. The sub-modules are connected to peripherals using Altera SPI-Core. The main module is responsible for controlling the submodules, reading data from them, and it also communicates with a NIOS-II Processor via the Avalon MM interface. Now the SPI-cores in the sub-modules also provide Avalon-MM interfaces on their backend. But these modules only communicate with the main module and not with each other or any other external component. This means that their Avalon interfaces will not be visible on the system bus. My questions is, can these cores be used in such a way? Or is the Avalon interface only for communication with NIOS and other external components?