FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6359 Discussions

Altera UFM for I2C interface protocol

Altera_Forum
Honored Contributor II
1,185 Views

Hi, 

 

I am using Quartus II (v14.0). 

Using the IP Parameter Editor i have created a altera_ufm_i2c with settings: 

Access mode: read only 

Address MSB: 1010 

Memory size: 4k 

currently initalized blank (all 1's) but will be init from file eventually. (am also a bit unclear what the file should look like (HEX), but that's a different question) 

 

This is then instansiated in my main code block. I am able to do a loop-back test over i2c so am confident the IP is correctly in my code.  

 

My question is: what is the protocol to read the ufm over i2c from a given memory location. On other devices i've used the process is normally: 

 

start bit / device address (1010-000-1[w])/ 16bit off set 

start bit / device address (1010-000-0[r])/ ... and the location is read from the offset memory olocation over i2c  

 

I have tried the following links but no luck so far: 

https://www.altera.com/en_us/pdfs/literature/ug/ug_alt_ufm.pdf 

https://www.altera.com/en_us/pdfs/literature/an/an489.pdf 

 

Any help much appreciated.
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
337 Views

Looks like what I was looking for is in here:  

https://www.altera.com/en_us/pdfs/literature/hb/max2/max2_mii51010.pdf  

page 16 onward 

 

4-Kbit Memory Size 

MSB LSB 

1 0 1 0 A2 A1 a8 R/W 

For the 4-Kbit memory size, the A0 location in the slave address becomes the MSB (a8) of the memory byte address.
0 Kudos
Reply