Community
cancel
Showing results for 
Search instead for 
Did you mean: 
ADufl
Beginner
194 Views

Associate an individual mif file to each RAM memory instantiated by a "generate"

Hello,

I instantiate RAM memories with the following VHDL code :

 gen_inst_ram_0to7 : 
for i in 0 to 7 generate
inst_ram : ram
port map(
address_a => w_address_a(i),
address_b => w_address_b(i),
clock => clk,
data_a => w_data_a(i),
data_b => w_data_b(i),
wren_a => w_wren_a(i),
wren_b => w_wren_b,
q_a => w_data_out_a(i),
q_b => w_data_out_b(i)
);
end generate gen_inst_ram_0to7;

I would like to use memory initialization files (*.mif) but don't know how to link the 8 files to the 8 instanciations.

Could you give me a hint to do such thing ?

Thank you.

 

 

0 Kudos
3 Replies
154 Views

You can try to study the RAM VHDL design code in Quartus. In the new VHDL file, right-click and "insert template". Find VHDL > Full Designs > RAMs and ROMs > Single-Port RAM with Initial Contents. 

There is a part of the design code on how to use .mif file. Or you can instantiate it using the Quartus IP Catalog. Hope it helps.

ADufl
Beginner
111 Views

Thank you for your answer but this template covers the case of using a *.mif file to set the initial state of an explicitly instantiated RAM block. My issue is about doing so when the RAM blocks have been instantiated using a "generate" statement.

Thank you  for your support.

117 Views

Hi, 

 

We do not receive any response from you to the previous question/reply/answer that I have provided. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.

 

Best Regards,

Shyan Yew

Reply