I tried to use Avalon MM to read the SDRAM of HPS. But after I set the correct value of fpgaportrst and raised the read signal to 1, all system was crashed.The attached figure is the result of SignalTap Analyze. http://www.alteraforum.com/forum/attachment.php?attachmentid=12822&stc=1 I output the read, readdatavaild, waitquest signals. You can see after read signal up to one, readdatavaild and waitrequest did not change, and then all system crashed. The structure of system and read_mem vhdl file. http://www.alteraforum.com/forum/attachment.php?attachmentid=12823&stc=1 Could anyone help me? Thank you!
How large is the SDRAM and what address is your master accessing? It would be easier to provide input if you captured all the read master signals and all the HPS SDRAM slave port signals.