FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5879 Discussions

Bandwidth Calculation of PCIe data Transfer for arria II speed -x1

Altera_Forum
Honored Contributor II
839 Views

Hi, 

i want to know what is the bandwidth of PCIe data transfer for ARRIA II GX FPGA Board with the Chained DMA Example provided by Altera.When testing with the GUI(which has Jungo drivers for PCIe),it shows as 200MB/s. But actually the speed is much lesser.I calculated on the write_enables generated per second. 

 

Regards 

Santosh
0 Kudos
3 Replies
Altera_Forum
Honored Contributor II
77 Views

The attainable throughput depends a lot on the size of the PCIe requests. 

Unless the request comes from some DMA engine that is adequately tied to the PCIe interface throughput will be very bad. 

I'm not sure the typical x86 PC has anything that can generate reasonable length PCIe requests.
Altera_Forum
Honored Contributor II
77 Views

Hi, 

I am using Chained DMA Engine example of Altera, which tested for DMA read (PC reading data from FPGA)shows speed as 178MB/s.But the write enables generated by DMA Example is very less i.e 25k/sec. so total throuput comes to 25k *64 Bits =1.6 Mbits/sec. 

So which is the correct speed?
Altera_Forum
Honored Contributor II
77 Views

Pls find attached the snapshot in zip format

Reply