FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5952 Discussions

Calculating Latency of DSP Builder System if Channel In and Out Blocks not used

Altera_Forum
Honored Contributor II
824 Views

Hi everyone, 

 

I want to implement basic averaging block in dsp builder and control it by using qsys.  

 

I have added five register field to obtain data from qsys and then I add them by using five inputs adder then multiply the result with 0.2. 

Finally, I write the result of the multiplication to the RegOut block. 

I have not used channel in and channel out blocks as in the example of demo_regs.mdl. Therefore, I do not know the latency of my dsp builder system. 

If I read the RegOut block soon after writing the data registers I read wrong result because the dsp builder system has not calculated the result yet. 

 

How can I know the latency of my dsp builder system and how can I understand finishing of the calculation? 

 

Thanks, 

 

Omer
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
72 Views

 

--- Quote Start ---  

Hi everyone, 

 

I want to implement basic averaging block in dsp builder and control it by using qsys.  

 

I have added five register field to obtain data from qsys and then I add them by using five inputs adder then multiply the result with 0.2. 

Finally, I write the result of the multiplication to the RegOut block. 

I have not used channel in and channel out blocks as in the example of demo_regs.mdl. Therefore, I do not know the latency of my dsp builder system. 

If I read the RegOut block soon after writing the data registers I read wrong result because the dsp builder system has not calculated the result yet. 

 

How can I know the latency of my dsp builder system and how can I understand finishing of the calculation? 

 

Thanks, 

 

Omer 

--- Quote End ---  

 

 

just pass some data and visualise the result (using spectroscope block of simulink) at any point
Altera_Forum
Honored Contributor II
72 Views

Hi Kaz, 

 

This is my dsp builder system. Where can I pass some data and see the result from the scope?
Altera_Forum
Honored Contributor II
72 Views

unfortunately can't open your design. 

for input use any of the "sources" blocks(of simulink) 

for visualising use scope from "sinks" blocks(of simulink)
Altera_Forum
Honored Contributor II
72 Views

Have you tried using GPIn / GPOuts, then using Properties ... > Block Annotation > latency = %<latencyCorrection>

Reply