Hi,I am wondering if its possible to implement a PCIe root IP in FPGA and use it to save streaming data into an off-chip high-speed storage device, such as SSD? Does PCIe controller handle complexities of file structure etc the way DDR controllers handle write into and read from SDRAM? Piyush
AFAIK the Altera PCIe component doesn't directly support the root mode with a Nios CPU. And even if it did, you would still need several layers of software to properly handle the external drive and file system.
Daixiwen,Thanks for the response. Based on what I have found so far, I agree with your obesrvation. It seems Altera (or any other vendor's) PCIe IP typically support layer 0/1 functionality and anything higher needs to be custom designed. In EP mode this is not prohibitelvely complicated, but in root mode I think it is going to be a major project. I wonder if this holds true for all other high-speed interfaces, such as SATA, Ethernet. Does anyone know of 3rd-party solutions out there which achieve such functionality? I am surprised that given that FPGAs are nowadays so widely used for high-speed data acquisition and processing, there is not much support for high-speed storage solutions (except DDR controllers).
There are a few third party SATA and firewire IPs (see here (http://www.altera.com/products/ip/ip-index.jsp) for a list of all official IP cores), but the main problem could be OS support. The IP provider should be able to give more information about which OS can be used with their IP.There are also several Ethernet cores, but I don't know if any OS available for Nios is able to handle iSCSI or FCoE.
Daixiwen,I checked 3rd party IP solutions and some of them seem to offer pure logic-based solutions to interface SATA to FPGA, i.e., without any processor+OS needs. Some even provide RAID IPs to connect multiple SATA SSDs, which I suspect I will need due to my bandwidth requirements. Unfortunately, these IPs are not cheap! Anyway, thanks for your input and help.