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Can we inject SEUs in the user flip-flops with the Fault Injection IP core? (Arria 10)

HGUZM3
Beginner
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Hi,

 

We are considering the Arria 10 for a project. We have studied the SEU injection IP core documentation, which shows it can inject faults in the configuration memory.

 

We would like to know whether it's possible to also emulate SEUs in the user flip-flops using the SEU IP core or with some other alternative.

 

Kind regards

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SreekumarR_G_Intel
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Hello , Yes , You can use the Fault injection IP cores along with emr IP for the Arria 10 to inject the fault. In the Quartus prime there is option for the Fault Injector debugger, using the debugger you can inject the fault and observe how advanced SEU IP detecting the error. Detailed information of fault injection in below link user guide. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_fault_injection.pdf Thank you , Regards, Sree

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SreekumarR_G_Intel
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Hello , Yes , You can use the Fault injection IP cores along with emr IP for the Arria 10 to inject the fault. In the Quartus prime there is option for the Fault Injector debugger, using the debugger you can inject the fault and observe how advanced SEU IP detecting the error. Detailed information of fault injection in below link user guide. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_fault_injection.pdf Thank you , Regards, Sree
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