I have a few doubts regarding how the rx_st_empty signal is updated during unaligned transfers where the SOP and EOP are asserted in the same cycle, specifically for a length of 1 DWORD.
For a write request with aligned address (e.g., address = 0), the valid data is located in rx_st_tdata[31:0], and the remaining bytes [255:32] are empty , leading to rx_st_empty = 7 (as only 1 DWORD is valid).
What happens if the address is unaligned (e.g., address = 4)? The valid DWORD shifts to rx_st_tdata[63:32]. In this case:
- Will rx_st_empty still update to 7 as before, considering the higher bits [255:64] and [31 : 0] are invalid?
- Or will it update to 6 since only [255:64] are empty?
For other unaligned addresses (e.g., address = 8, C, 10, ..., 1C), where the valid DWORD keeps shifting to the right, how does rx_st_empty update in these cases Especially for .1 dword length case ?
For a read request of 1 DWORD length, does rx_st_empty behave similarly to a write request with unaligned addresses, or is its value fixed regardless of alignment?
I’d appreciate any insights or examples to clarify how rx_st_empty behaves in such scenarios.
