Current demand of Max 10 JTAG pins.

[Bryn]

Hi,
I’m trying to locate literature or details regarding the current demand on the JTAG pins for a Max 10 device. Can the JTAG pins be considered in the same bracket as the general I/O requirements? i.e. LVTTL (4mA) and LVCMOS (2mA) or do they have their own characteristics. The information would be helpful to ensure that anything i use to interface with the JTAG port will be sufficient in driving the pins.
Any help or advice is greatly appreciated.
Regards,
Bryn

[EngWei_O_Intel]

Hi Bryn

You can refer to Section "Configuration/JTAG Pins" in the doc below for the JTAG pin connection requirement:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/max-10/PCG-01018.pdf

More information can be found in Chap2.1.1 of the doc below:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_config.pdf

Thanks.

Eng Wei

[EngWei_O_Intel]

Hi Bryn

We do not receive any response from you to the previous reply that we have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Eng Wei