FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5949 Discussions

Cyclone 10 GX 40GBASE support

KRoma6
Beginner
259 Views

Hello,

I am designing a 40GBASE application with the Cyclone 10 GX. The XCVR transceiver user guide gives limited direction to setting up the platform designer with this protocol. 

First, is there a 40GBASE MAC IP for this card? I am assuming you cannot configure four 10GBASE MAC IP to implement 40GBASE.

 

Second, how is the Enhanced PCS interface width determined?

 

Third, are there any other specific setting in the Native PHY, reset controller, or PLL to implement 40GBASE?

 

Fourth, does the reset controller need to be with the same clock as the PHY and PLL?

 

Finally, is there an example design I can take a look at?

 

Thanks,

-K

 

0 Kudos
3 Replies
Deshi_Intel
Moderator
220 Views

Hi,


FYI. Intel doesn't offer 40G Ethernet IP on Cyclone 10 GX device.


However, we do offer 40G Ethernet IP on Arria 10 device. You can find the respective user guide doc and example design doc in below link


This is fully MAC + PHY 40G Ethernet IP where user doesn't need to worry about internal connection that interact with NativePHY IP. NativePHY IP connection will be taken care of as internal design block of the 40G Ethernet IP.


Thanks.


Regards,

dlim




KRoma6
Beginner
214 Views

Hello,

Thanks for the reply.

So there is support for the 40GBASE PHY but not the MAC? Do you no of any third party MAC IP providers? We already have the board design finished for the Cyclone.

Can the Arria IP be leveraged for us to create our own MAC or will this have to be done from scratch?

KRoma6_0-1630506043110.png

Thanks,

-K

 

Deshi_Intel
Moderator
200 Views

Hi,


It's unfortunate you have build C10 GX board.

  • I google around but I don't see any 40G ethernet IP solution that offered by any of the Intel design partner house


Pls see my reply below

  1. So there is support for the 40GBASE PHY but not the MAC? Do you no of any third party MAC IP providers? We already have the board design finished for the Cyclone.
  • You have mistaken with the 40GBASE preset in NativePHY IP. The preset just helped user to enabled transceiver skeleton design to prepare to intercept with Ethernet PHY design if user decided to create one.
    • The preset doesn't turn NativePHY IP to become 40G Ethernet PHY IP that equipped with Ethernet PHY function. You probably miss out NOTE 6 at the end of the table 3 that you show me
    • NOTE 6 - Link training, auto speed negotiation and sequencer functions are not included in the Native PHY IP. The user would have to create soft logic to implement these functions when using Native PHY IP.
    • In short, The NativePHY IP doesn't contain Ethernet PHY function
  1. Can the Arria IP be leveraged for us to create our own MAC or will this have to be done from scratch?
  • Sorry to say so but unfortunately you will have to build your own 40G Ethernet PHY + MAC IP solution if you decided to stick with Cyclone 10 GX device


Thanks.


Regards,

dlim


Reply