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Hi, everybody~~~
Will you please give me some advice on how to generate the DDR2 addresses in a better way. And I need to storage data in two different fifos into the DDR2, so I have to fetch fifo data alternatelly. But I don't have good idea that how to generate the address, and the following code is my test code. Thank you for your advice~~~ always@( posedge clk or negedge rst_n) begin if( !rst_n) col_addr <= 10'd0; else if( local_ready==1 && wfifo1_read_req ) begin if( wfifo1_ca_r == {10{1'b1}}) wfifo1_ca_r <= 10'b0; else wfifo1_ca_r <= wfifo1_ca_r + 1; col_addr <= wfifo1_ca_r; end else if( local_ready && wfifo2_read_req ) begin if( wfifo2_ca_r == {10{1'b1}}) wfifo2_ca_r <= 10'b0; else wfifo2_ca_r <= wfifo2_ca_r +1; col_addr <= wfifo2_ca_r; end else if ( local_ready && rfifo_write_req ) begin if( ) end end Thanks a lot~~Link Copied
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