Hello, I' trying to use the DDR3 UniPHY IP.
I generate the clock and reset signal and input to the IP.
After setting the global_reset_n high, the IP set the afi_reset_n low after 15 afi_clock.
And set the mem_reset_n low after more 2 afi_clock.
But the IP won't set the mem_reset_n high to start initialization.
(The IP example will set mem_reset_n high almost at 16 us)
Can someone give me some suggestions?
Thank you.
