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Honored Contributor I
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DMA controller doesn't work properly

Hi everyone! 

I'm confused, because I really tried everything I could, but the DMA does not work. 

I use such functions:  

/** 

* Set transmit channel 

*/ 

static inline void moveTo(dhdlc_t *dhdlc, void *ptr, size_t blocksize){ 

IOWR_ALTERA_AVALON_DMA_STATUS(DMA_0_BASE,0); 

IOWR_ALTERA_AVALON_DMA_RADDRESS(DMA_0_BASE,ptr); 

IOWR_ALTERA_AVALON_DMA_CONTROL (DMA_0_BASE, TXDMA_CONTROL); 

IOWR_ALTERA_AVALON_DMA_LENGTH(DMA_0_BASE, blocksize); 

 

while ((IORD_ALTERA_AVALON_DMA_STATUS(DMA_0_BASE) & ALTERA_AVALON_DMA_STATUS_BUSY_MSK)); 

 

/** 

* Set receive channel 

*/ 

static inline void moveFrom(dhdlc_t *dhdlc, void *ptr, size_t blocksize){ 

IOWR_ALTERA_AVALON_DMA_STATUS(DMA_0_BASE,0); 

IOWR_ALTERA_AVALON_DMA_WADDRESS(DMA_0_BASE,ptr); 

IOWR_ALTERA_AVALON_DMA_CONTROL (DMA_0_BASE, RXDMA_CONTROL); 

IOWR_ALTERA_AVALON_DMA_LENGTH(DMA_0_BASE, blocksize); 

 

while ((IORD_ALTERA_AVALON_DMA_STATUS(DMA_0_BASE) & ALTERA_AVALON_DMA_STATUS_BUSY_MSK)); 

 

where: 

# define TXDMA_CONTROL (ALTERA_AVALON_DMA_CONTROL_WORD_MSK |  

ALTERA_AVALON_DMA_CONTROL_BYTE_MSK |  

ALTERA_AVALON_DMA_CONTROL_HW_MSK |  

ALTERA_AVALON_DMA_CONTROL_QWORD_MSK |  

ALTERA_AVALON_DMA_CONTROL_DWORD_MSK |  

ALTERA_AVALON_DMA_CONTROL_GO_MSK |  

ALTERA_AVALON_DMA_CONTROL_LEEN_MSK |  

ALTERA_AVALON_DMA_CONTROL_WCON_MSK) 

 

/** 

* Receive control register setup macro 

*/# define RXDMA_CONTROL (ALTERA_AVALON_DMA_CONTROL_WORD_MSK |  

ALTERA_AVALON_DMA_CONTROL_GO_MSK |  

ALTERA_AVALON_DMA_CONTROL_LEEN_MSK |  

ALTERA_AVALON_DMA_CONTROL_BYTE_MSK |  

ALTERA_AVALON_DMA_CONTROL_HW_MSK |  

ALTERA_AVALON_DMA_CONTROL_QWORD_MSK |  

ALTERA_AVALON_DMA_CONTROL_DWORD_MSK |  

ALTERA_AVALON_DMA_CONTROL_RCON_MSK) 

 

The read/write addresses are set in my function before the usage of move_ functions.  

 

Reading from memory to a peripheral does work well. But writing from a peripheral is partially done and than the BUSY reg is set and the whole transmission gets stuck :/  

I have to admitt that the DMA controller in Quartus Prime 16.1 standard edition does work only for maximum of 64 bursts for txchannel...  

Have anyone had the same bug/problem as I? 

I tried to use the Altera provided HAL functions, but register access works better.
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