Hi,first le me ask you, if it is possible to mix the simulink and altera blocks in one design? So can the dsp builder translate the standard simulink blocks into a vhdl file or qurtus project? So far, I think it should work, but there is a problem between the data format, i cannot solve until now. For example, I use an altera input with signed integer 32bit (its displayed as INT_32). Now, i want to drive a simulink block with the same data format. But simulink doesn`t accept this data. Furthermore, simulink displays signed integer 32bit as int32. So what causes the incompatibility? Both data formats are definitly signed integer 32bit. How can this be solved? Thank you in advance.
as far as I know, they are no directly compatable.DSP Builder can only generate VHDL for dsp builder blocks. You need to use simulunk HDL coder (which is an extra licence from mathworks) to generate HDL from simulink blocks. Simulink blocks also require the fixed point toolbox (another licence extra).
Thank you for your quick reply.Unfortunately these are no good news. I looked forward to use simulink because of the good diagnostic functions and the plot function of matlab. So, in Quartus these possibilities are very limited. As mentioned in an other post (http://www.alteraforum.com/forum/showthread.php?t=3462), the altera I/Os were used to translate the simulink data format into alteras data format. So it might be possible, to define a altera data entrance into simulink, doing the total processing in simulink and get the data out via altera outputs? Or did i missunderstand this post? In my example design, i could get the data into simulink, but i cannot convert it, that the altera output pin accepts the data.
Mixing simulink and DSP builder is fine within the same top level module, but you need to keep the DSP builder elements together inside their own blocks with no simulink blocks next to them. DSP builder parts need to be self contained.