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Hello,
I am working on a design that needs to send pixel data via a camera link from a FPGA to a TI OMAP Camera ISP interface. The target FPGA is a Cyclone IV GX device. The Camera ISP on the TI OMAP is a MIPI D-PHY CSI2 and CSI1/CCP2 compatible interface. My questions are as follow: 1. Has anyone on the forum done similar design using an MIPI IP they bought from a IP vendor? 2. If there is someone out there that done this before, which IP vendor would you recommend? 3. What are your experiences design this interface and would you recommend to design this interface without using a MIPI IP core? (i.e. design this yourself) How many months of development time? 4. What Altera device were you using and what was the resource utilization for the IP core and the surrounding logic? 5. What was the speed and data lanes, throughput etc achieved via this interface? Thanks,Link Copied
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The MIPI spec is only available to MIPI Alliance members and a seat will set you back $10,000.- per year. So I don't think you will find many takers here.
Also the MIPI Alliance is geared to big organisations (> 250M$/yr) and that kind of people don't spill their 'secrets' (on an 'open' forum like this one). So I guess you are pretty much on your own. Any particular reason to use a MIPI interface?- Mark as New
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Actually my FPGA has to interface to the TI OMAP Camera ISP interface.
The two serial ports on the the ISP can be configured either as MIPI CSI2 at 1 Gbps/lane or CSI1/CCP2 (legacy). I would think that there are a lot of users sending the data over this interface and would need to design a MIPI CSI2 compatible interface. I have researched into some IP vendors already but have considered designing the interface myself. However, we are on a very tight schedule. Thus, acquiring IP core is an option. I did not know about the $10,000 membership fee to join the MIPI alliance. No wonder I cannot find the MIPI spec on line. Thanks,- Mark as New
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I had to look deep to find the 'cost of membership'.
Actually smaller companies can get a 50% to 75% rebate. :) You may find the $ 2,500,- a bit more feasible? I don't expect much magic in that MIPI spec. The closest information I could find was on Northwest Logic's web-site : http://www.nwlogic.com/products/mipi_solution.html (http://www.nwlogic.com/products/mipi_solution.html). You can download a product brief showing what you need: the tx module. Which OMAP CPU do you have in mind?- Mark as New
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Yes. I am already in contact with them but thanks for bring it up.
We are using TI DM3730.- Mark as New
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--- Quote Start --- We are using TI DM3730. --- Quote End --- Now I did a (brief but thorough, I think) check and I only found a parallel camera interface in the DM3730 datasheet. The TRM for the DM37x documents the MIPI serial interfaces, but it states that this is not available on all devices in the DM37x family, see page 195 of the TRM. Being curious again, what camera / image sensor are you thinking of?
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--- Quote Start --- Hello, I am working on a design that needs to send pixel data via a camera link from a FPGA to a TI OMAP Camera ISP interface. The target FPGA is a Cyclone IV GX device. The Camera ISP on the TI OMAP is a MIPI D-PHY CSI2 and CSI1/CCP2 compatible interface. --- Quote End --- Hi, Peter. Maybe these files will helpful to your project.
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Hi Peter,
How's your progress with the CSI2 interface ? I'm thinking of doing a similar design of sending video data from a camera through a Cyclone IV E to the CSI2 interface of a OMAP DM3730. Any advice you can provide ? Thanks. Hui Peng- Mark as New
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--- Quote Start --- Hi Peter, How's your progress with the CSI2 interface ? I'm thinking of doing a similar design of sending video data from a camera through a Cyclone IV E to the CSI2 interface of a OMAP DM3730. Any advice you can provide ? Thanks. Hui Peng --- Quote End --- Yes, I am interested in pursuing a similar project using MIPI to an OMAP 44xx but the seats are $10K (US) and the TI evaluation boards are overpriced to begin with. Is there ANY information out there that is not a rip-off like USB was eight years ago? Why do we engineers put up with this cycle of proprietary bullS*** and waste time with finding something that is a duplication of prior efforts? The OMAP 5 has MIPI and USB3.0 but I might as well use an Intel processor for what TI is asking, especially by the time I mess with the driver and integration bullS*** Anyway, ANY help would be greatly appreciated. I love the ease of use of Altera products, the customer is making me take the integration with OMAP route, grrrr. TIA
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