I tried to simulate the emif IP, but it shows below error:
227213 ns: ERROR: iossm_bf_cpu_cpu_test_bench/ihp_read is 'x'
$stop at time 227212598000 Scope: unex_block_design.emif_s10_0.emif_s10_0.arch.arch_inst.io_ssm_inst.io_ssm.inst.PROTECTED File: PROTECTED Line: 0
i used vcs 2019 sp2
generated for device 1SD280PT2F55E2VGS1 from quartus 19.4
steps used :
1.generated the default IP
2.go to sim folder>synopsys vcs
3.run command sh vcs_setup.sh
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I believed your design contain Intel® Stratix® 10 HPS EMIF thus you will see this error is generated. It is a known issue as Stratix 10 HPS EMIF simulation is not supported.
You may refer to this KDB link for more details -->
I am not using Intel® Stratix® 10 HPS EMIF instead I am using External Memory Interfaces Intel stratix 10 FPGA IP. It is simulating if I am using this IP with other bunch of IP's. But while I was trying to create libraries using the script provided by quartus. When i select the option from tools>Generate simulator script for IP.
I ran the script and it shows error mentioned above when it reaches to simulate EMIF IP.
Reference snapshot attached. The blue circled one is used in the design.
I did internal searching and found that the simulation tools supported for VCS Quartus version 19.4 is O-2018.09-SP2-2 (64-bit Linux only).
Can you try to swicth to vcs 2018 sp2 and see if the error still replicate ?
I see the same problem while simulating the EMIF design which does not contain the HPS core. I am using xcelium2019.09_s007 and here is the error I see during configuration:
170038 ns: ERROR: iossm_bf_cpu_cpu_test_bench/ihp_read is 'x'
Simulation stopped via $stop(1) at time 170037750 PS + 3
Can you help with this?