FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5881 Discussions

Embedded attributes inside AVSPI core fail during compile


In one of the AVSPI core files, spiphyslave.v, are several set_false_path attributes that are causing several warnings such as the following, during Compile:


/*local reg for shift register*/ 

(* altera_attribute = {"-name SDC_STATEMENT \"set_false_path -from [get_pins -no_case -compatibility_mode *SPIPhy_altera_avalon_st_idle_inserter|received_esc*|*] -to [get_pins -no_case -compatibility_mode *|rdshiftreg*|*]\" "} *) reg [7:0] rdshiftreg;   


Warning (332049): Ignored set_false_path at qfit2_legacy_fmain_fitter_flow.tcl(117): Argument <from> is an empty collection

Info (332050): run_legacy_fitter_flow


Since this is down inside a Quartus IP, is there a recommended way to handle this?

For example, should the core file(s) be modified by commenting out the failing set_false_path constraints and replace with corresponding SDC file constraints? This seems like a stretch, modifying a tool-generated core. Is there a more suitable solution?


Thank you.


0 Kudos
1 Reply


1) This set_false_path -> set_false_path -from [get_pins -no_case -compatibility_mode *SPIPhy_altera_avalon_st_idle_inserter|received_esc*|*] -to [get_pins -no_case -compatibility_mode *|rdshiftreg*|*]  in MISO block is wrong.

This is fixed in 19.1std b659 onwards to -> set_false_path -from [get_pins *] -to [get_pins -no_case -compatibility_mode *|rdshiftreg*|*]

   Can you please either regenerate the RTL or replace the SDC content?

2) This set false path -> set_false_path -from [get_pins -no_case -compatibility_mode *|stsourcedata*|*] -to [get_registers *] is in MOSI block. 

   I noticed from the Technology map viewer that MOSI block doesn't exist (synthesize away). Did you not connect up MOSI interface? If this is expected then this set_false_path can be ignored.