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Error 14566 placiing multiple Transceiver Native PHY IP in Arria 10

KKuhl1
Novice
478 Views

Hi I have instantiated a Transceiver Natiive PHY block in my design and it builds fine. When I place a second copy of the IP in my design and connect it to other pins I get the following error

 

Error (14566): The Fitter cannot place 4 periphery component(s) due to conflicts with existing constraints (4 HSSI_TX_CHANNEL_CLUSTER(s)). Fix the errors described in the submessages, and then rerun the Fitter. The Intel FPGA Knowledge Database may also contain articles with information on how to resolve this periphery placement failure. Review the errors and then visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.

 

 

Any help would be appreciated

 

Thanks

Kent

0 Kudos
3 Replies
CheePin_C_Intel
Employee
169 Views
Hi, As I understand it, you observe fitting issue after adding second instance of the Native PHY in you A10 design. There is no issue when there is only one instance in the design. To facilitate further debugging, would you mind to share with me simple test design with only Native PHY instances which could replicate your observation? I would like to perform replication and further look into it to see if can spot any anomaly. Thank you.
KKuhl1
Novice
169 Views

Thanks but I found the issue. It was an HDL coding error where the TX pins were inadvertently being routed to both PHY blocks.

CheePin_C_Intel
Employee
169 Views
Hi, Thanks for your update. Glad to hear that you have managed to resolve the issue.
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