FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
The Intel sign-in experience has changed to support enhanced security controls. If you sign in, click here for more information.

Ethernet transmission

Altera_Forum
Honored Contributor II
764 Views

Hi all, 

 

I write a program to generate the ethernet packet using logic cell and implement to ENET_TXD[7:0] (i use gigabit mode). I saw the TX light on the board blinking, while I can not receive any data on my computer (I use a C socket program to receive the data). Anyone know how to fix that? 

 

My ethernet packet is followed by this rule: 

 

Preamble : 55 55 55 55 55 55 55 

SFD: D5 

Destination address: 00-26-9E-B4-DA-BB 

Source address: 00-07-ED-11-80-C9 

Length: 00 64 

data: 00 00 ... (one hundred 00) 

CRC: 6C-CC-4B-B2 

 

I use DE3 and a HSMC-NET daughter board 

 

Thanks!
0 Kudos
0 Replies
Reply