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Altera_Forum
Honored Contributor I
681 Views

FIR filter with non-muxed channels

Hello all, 

 

I am new to filter design, so please forgive any stupid questions. 

 

I am using Quartus II 9.1 and FIR compiler 9.1 to design a low-pass filter. Everything works fine until I try to build a 2-channel filter whith no data muxing.  

 

I would like to have what I think is described in the "FIR Compiler II MegaCore Function User Guide" as "Multi-channel on a multi-wire". 

Here is the physical setup: 

- Two 8-bit ADCs, an FIR filter with 2 channels, one set of 37 coefficients, and 2x8bit data fed into on every clk. 

 

I have used following parameters: 

- Single Rate 

- Number of input channels: 2 

- Structure: "Distributed Arithmetic: Fully Parallel Filter" 

- Coeffs: Auto-scaling, 8-bit 

- Pipeline level: 1 

- Data and Coeff storage: Auto 

- Output: full resolution (18-bit) 

 

I cannot find anything to tell the compiler I want unmuxed data, and whetever I do it always generates an 8-bit in-port and an 18-bit out-port and bloody xxx_sop and xxx_eop signals to synchronise the muxing. 

 

Thank you for your help, 

 

Alex
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3 Replies
Altera_Forum
Honored Contributor I
36 Views

Hye Alex, 

 

I assume you're using the FIR Compiler II ? 

 

If so: 

Under the tab 'implementation options', there is a box 'Frequency Specification'. 

If the Clock frequency and input sample rate are not equal, the FIR II compiler will use the relation between these two to optimize the hardware, and you'll have the EOP and SOP signals. 

 

If you'll make them equal (so i've tried with your settings) you'll end up with 16 bits input and full-scale output when you chose not to truncate/round. 

 

I'm using quartus v10.1sp1, so maybe there is a difference.. 

 

Grtz, 

 

Olaf
Altera_Forum
Honored Contributor I
36 Views

the parameters look more like FIR Compiler I 

 

Alex, you should instantiate your filter twice. the channelization in the core is built for TDM resource sharing
Altera_Forum
Honored Contributor I
36 Views

I had not realized that there are two versions of the compiler. Even on the Altera FIR webpage ("FIR Compiler II / FIR Compiler MegaCore Function") it is not clear at all how the 2 versions coexist and differ. To which version does the document "fircompiler_ug.pdf" refer to? 

 

Here is what it says in the MegaCore documentation bit: 

- Core Version: v9.1 Build 222 

- Release Date: November, 2009 

- Ordering Code(s): IP-FIR 

- Product ID(s): 0012 

 

And I can't find any "implementation options" tab, so I guess it's bad luck for me: I think it's FIR Compiler I that I have a license for. 

 

ThePancake, I will try and instantiate the filter twice and see how it optimizes. 

 

Alex
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