FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5990 Discussions

Functional test of the FFT IP

ADmcj
Beginner
1,039 Views

Hi all,

 

I would like to test the FFT IP.

 

As such I tried to use the example that is generated with the IP parameter editor (quartus 17.1), but it generates only stuff in verilog while I need vhdl. Moreover, everything is automated with a script (compilation) and as such I don't know how to organize the files in my own project in modelsim.

 

So my question is: after having generated the IP with quartus, what files are required to be imported in ModelSim in order to be able to launch a simulation of the block?

 

Thank you!

0 Kudos
2 Replies
vj123
Novice
212 Views

Hi,

  1. While Configuring parameters of FFT IP use "​Generate HDL.." tab & choose VHDL under Synthesis & Simulation.
  2. Check output Directory path.
  3. Then click on "Generate"
  4. Use  that generated .vhd file under Synthesis Directory as a design under test(DUT) in ModelSim & write a test bench for simulation if you don`t want to simulate it using TCL script.

         5. If you want use Automated test bench then use NativeLink.

 

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards

Vikas Jathar

ADmcj
Beginner
212 Views

Sadly is not working.

I imported the file as you said and passed the input as specified in the manual, but the block doesn't do anything. Not even error on the error line.

 

EDIT: I am using variable streaming with fixed point.

Reply