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New to using some of the Avalon based cores. I generated a 128MB Generic Serial Flash Interface core for my EPCQ128A Flash, the addressing is only Avalon memory is section is 22 bits, but how do I sent my 24-bit address to the core to send to the flash? Am I missing a correlation between the value sent to the Avalon memory and the Flash memory?
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128 MBit Flash uses 24-bit-wide byte address. AVMM interface has however 22 DW addresses + 4 byte-enable lines to access the flash. A doubleword access at AVMM is translated by GSFI core to 4 consecutive internal byte accesses.
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Your math is correct, but I'm slightly confused. If I'm not mistaken, the difference due to the word sizes of the GSFI being 32 bit as compared to the byte addressing of the flash.
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Hello,
Can you refer to this page? link : https://www.intel.com/content/www/us/en/docs/programmable/683271/current/understanding-quad-spi-flash-byte-addressing.html
regards,
Farabi
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128 MBit Flash uses 24-bit-wide byte address. AVMM interface has however 22 DW addresses + 4 byte-enable lines to access the flash. A doubleword access at AVMM is translated by GSFI core to 4 consecutive internal byte accesses.
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I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
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