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Hi Dheeraj,
Is your base address and offset address set correctly on software?
Also please refer to sessions 9.4 & 9.2.4. from below link
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_embedded_ip.pdf
Check knowledge-base solutions from below link
https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd10052010_44.html
Regards
Anand
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Hi Anand,
Base address and offset address is correct, because i am able to access(read) PHY Registers.
this sessions 9.4 & 9.2.4. is related to Ethernet MDIO but in my design i am using MDIO Slave. This is the different IP and he is acting as a slave to CPU.
on processor side we have only MDIO MDC lines. so we cannot use Ethernet MDIO .
Thanks,
Regards,
Dheeraj
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Hi Dheera,
Can you share the user guide?
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Hi,
Presently I don't have access to the IP I will try to get.
Meanwhile, try to use a signal tap for debugging & share images.
Regards
Anand
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Hi Dheeraj,
Apologies, We can't provide any information or help in debugging the third party IP.
For further support on third-party IP's,We recommend you to contact the IP vendor.
Regards
Anand

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