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Hi,
I have a problem to test my FPGA-Design with NIOS II and the DDR2High-Performance-Controller. I have a FPGA Design in which I have a SOPC-block. The block includes a NIOS II and the OpenCorePlus DDR2-High-Performance Controller.When I want to test my FPGA-design, I only have the possibility to use the Programmer from Quartus II with connected JTAG cable. Unfortunately I do not know how I can test my NIOS II C-code on this system because I am not able to send the code with the Flashprogrammer and the SOPINFO-file which is related to my FPGA-Design. Is there a possibility to test my system? Helpful replies would be very very nice! CHeers SteffenLink Copied
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