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hello ,
We use Arria10 on our customer board.
In our System, we need implement mSGDAM Core to transfer a bundle of 128 descriptors for data moving from cpu to fpga device . I checked " ug_embeded" user guide, but still not clear about " HOW can mSGDMA perfetch IP realize this "。 What's the procedure to implement this ?
Is there an exampel for mSGDMA prefetched enabled design ? We use Linux on CPU 。
Thanks in advance ~
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Hi Jet
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Hi JET60200,
Do let me know if this relevant to what you are looking for?
https://community.intel.com/t5/FPGA-Wiki/MSGDMA-design-example/ta-p/735335
Thanks.
Regards,
Aik Eu
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Hi JET60200,
Any new follow up on this?
Thanks.
Regards,
Aik Eu
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Hi JET60200,
We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Thanks.
Regards,
Aik Eu

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