How to access data from altsyncram in two different ways

[Altera_Forum]

I have an altsyncram consisting of 4,096 words, 64-bit each. 

The RAM is easily accessed by application A using widthaddress = 12 and widthdata = 64.  However, I'd like to be able to access the same RAM from application B, but using widthdata = 80.  Is there a simple way to do this? (without using dual-ports, which I am already using for another reason).  I was thinking about fetching the data slightly in advance in application B, then do the 80-bit divison myself. Is this usually done?  Thank you!

[Altera_Forum]

how are you planning on accessing the data on the 80bit side? 64bits of D0 and 16 bits of D1? then 48 + 32? etc 

 You cannot do any mixed widths without duel port, how do you expect to get 80 bits out of a 64 bits data bus?

[Altera_Forum]

Yes I was thinking about doing what you're saying (64bits of D0 and 16 bits of D1? then 48 + 32? etc).

[Altera_Forum]

Well, you wont be able to do that with a standard altsyncram. You might be able to do it by cleverly connecting a load of 16 bit wide rams and addressing them properly.

[Altera_Forum]

Hmm, that's even more complicated... 

 I'm not even sure how it would work with a dual-ported version? 4096 x 64 = 262,144 bits of data, which is not divisible by 80. I see problems happening at the boundaries... Worst case I could put some garbage data in the last word. It would be written/read and then ignored, the cost seems small compared to the size of the RAM.  Thanks for the response!  Edit: So for a dual-port version, I'd still use a width of 12 for the address? since I would need 3276.8 words of 80-bit each. Which is between 2^11 and 2^12. Hmm... I hope it's doable :).

[Altera_Forum]

The megawizard compiler says "The valid ratio btween port A and port B widths are 1, 2, 4, 8, and 16." 

 It looks like I can't have 64 and 80 bits in one altsyncram...

[Altera_Forum]

like I said, you wont be able to use a single altsyncram. You should be able to do what you want with a custom memory that is built from 5x 16 bit altsyncrams, and custom address decoding.