I received our first prototype PCBs with an Intel Cyclone 10 LP device (10CL006YE144C8G) equipped.
Since a few days I'm trying to bring-up this FPGA device, but I was not successful and I need some additional input.
Here is what I've experienced/tried so far:
I'm having an active serial (AS) configuration with an externel flash. I'm monitoring the configuration signals (VCCIO, nCONFIG, nSTATUS, CONF_DONE, nCE, DCLK) with a logic analyzer. After applying the supply voltages, the only reaction I get from the FPGA is that nSTATUS goes HIGH right after POR and goes back LOW after ~450us.
According to the datasheets, I would expect nSTATUS to stay HIGH.
Does anyone have an idea what's going on here?
Thank you for contacting Intel community.
For active serial configuration, you will need to generate JIC programming file instead of POF programming file. Try:
Also, have you refer to device design guidelines:
Pin connection guideline:
Let me know your feedback.
Thanks for your pointers and suggestions.
I had a hard time figuring out our problem with that FPGA, but I finally did it:
We did not have the thermal pad connected to GND in the design. Because of this, the JTAG programming and Active Serial programming did not work.
Another problem we encountered was that when programming the external flash chip from an MCU, we have to bit-flip each byte in the programming file before writing.
I assume you are using rpd? During rpd generation, you will need to select little endian format as you are having Active Serial for your configuration.