How to connect Alt2GXB component to pin?

[Altera_Forum]

Hi guys, 

 I'm struggeling with the Alt2GXB megafunction. It seems that I'm to dumb to connect the serial rx signals to their pins. I tried to connect the inputs of the megafunction directly to the pin but quartus sais that my assigned port is no part of the design. :confused:  I searched in the manual how to connect such megafunction but didn't find anything that helped me out.  Maybe it is a little, fundamental thing i did not concern, but i don't get it. :(   I would be glad if someone could give me a short instruction how to connect my megafuntion to a pin.  Thanks in advance. dave

[Altera_Forum]

Are you using Verilog, VHDL, or schematic for your design? There really is not magic here. You simply connect the port on the megafunction to a pin in your top level design. 

 Jake

[Altera_Forum]

I'm using vhdl. 

When i connect the pin to a top level port, the compiler argues that a GXB transceiver pin is not connected to an transceiver location.  I usually have no problems connecting my pins but in this case there has to be something different and unfortunatelly i don't know what, yet.

[Altera_Forum]

Okay that explains a little more. Your problem is that you have pins in your top level design that are assigned to transceiver pins and those pins are NOT connected to an ALT2GXB instance. In other words, Quartus does not allow you to have unused transceiver pins in your top level design. So, just temporarily comment out any unused transceiver pins in your top level. 

 You should be able to expand the error in Quartus for more details.  Jake

[Altera_Forum]

If you have connected every transceiver pin in your design to a ALT2GXB instance, then consider that your ALT2GXB instances may be getting optimized away during synthesis (no logic depending on their outputs). 

 Jake

[Altera_Forum]

--- Quote Start ---  If you have connected every transceiver pin in your design to a ALT2GXB instance, then consider that your ALT2GXB instances may be getting optimized away during synthesis (no logic depending on their outputs).  Jake  --- Quote End ---    Thats was it. I didn't drive any logic so far, because i just wanted to check how i instantiate it and so quartus optimized away my component.  Thanks a lot man!  Best regards, David