FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5886 Discussions

How to map the "DRDout" to GPIO of ufm in MAX V

Zhilang_X_Intel
Employee
451 Views

I want to map the data register to GPIO so I could control the value of GPIO via ufm's i2c interface, I want to know if it is right as below:

 

0 Replies
Reply