How to obtain the End-point bus number from Hard IP for PCI Express Intel Arria 10 Avalon ST?

[AMalo4]

During assembly, a Memory Read Request's we need to know the End-point bus number which provided by Root Complex. If a wrong value used the Root Complex will not provide answers on End-point requests. How we can obtain it from Hard IP for PCI Express Intel Arria 10 FPGA IP?

The question is closely related to this one "PCI-E Avalon-ST64: how to get Bus and Device number of card?"

[SengKok_L_Intel]

Hi,

The BDF of an endpoint can be obtained from the configuration space register. You can refer to section 5.1.2 to 5.12.2 (transaction layer configuration space signals) for the detail, where the register name is cfg_busdev[12:0]

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_avst.pdf

Regards -SK