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How to simulate DDR2 using ModelSim-Altera

Altera_Forum
Honored Contributor II
1,098 Views

Can anyone please help me to solve this problem? 

 

I have compiled all the files successfully in modelsim. While simulating DDR2, the signals mem_dq and few other signals are undefined.  

 

Kindly explain the steps to simulate DDR2 IPcore 

 

Please help me...... 

 

Thanks & Regards 

VV
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Altera_Forum
Honored Contributor II
407 Views

If you are using the megafunction to generate DDR2 controller,  

then modelsim testbench and memory model should have generated. 

 

That make life a lot easier.
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