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I'd like understand the difference between these 3 option:
get_fanins -async
get_fanins -sync
get_fanins -clock
because in the "get_fanin -help" I didn't understand the difference.
is there any exemple that can show the difference between these options?
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- constraints
- SDC
- tcl
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The definitions are not clear
-asynch Traverse through asynch edges
-clock Traverse through clock edges
-synch Traverse through synch edges
So for example I created this test case:
I get the fanins of the "In_pin" input using "-async" , "-sync" and "-clock" option and I get no difference between the 3 results.
So how can I see the difference between these options in a design?
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What u can do is use the tecnology map viewer to look into the netlist.
-asynch Traverse through asynch edges, this normal happened on after LUT1 where no clock involve.
-synch Traverse through synch edges, usually, on the register where clock is involve.
-clock Traverse through clock edges, on the clock path rather than the data path. for example, output of PLL.
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Thanks

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