The actual error reported is:
** Error: D:/intelFPGA/18.0/quartus/eda/sim_lib/altera_lnsim.sv(24438): Module 'arriav_ffpll_reconfig' is not defined.
Thanks for answering, but what do you exactly mean? What does it help me to simulate a simple PLL when I want to simulate a cascaded PLL configuration? It seems simulation isn't possible because a file with the correct module isn't available.
Want to check all the simulation variables and setting are correct, that is the reason for asking to simulate the simple PLL and check the tool is working properly.