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Hi,
Is it possible to use Altera IP Cores without a NIOS II processor? As far as I can understand from documentation all the IP cores connect to an Avalon bus provided by the NIOS II. Is it possible to implement an Avalon bus without the use of a NIOS II?Link Copied
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You can use most of the IPs without Nios. I think the exceptions are ones in the Q-II handbook volume V.
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How do I create a Avalon bus master without a NIOS? Should I write one myself, or are there prewritten code available?
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You should develop your own logic as Avalon master. I don't think there are prewritten code.
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Specifically which IP cores are you looking to use? Some of the cores really aren't useful without a processor attached to them. But to answer your question, yes you can use SOPC builder to create system based on Avalon without a NIOS processor.
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Currently I'm only looking at using a 2-port RAM (which is available via the MegaFunction wizard), and a UART (RS-232) which is only available via the SOPC builder.
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The UART available in the SOPC Builder IP was specifically designed to be used in conjunction with SOPC builder and the NIOS processor. You can still use it without the NIOS processor.
You'll of course need to write your own avalon master. You can read the documentation to find out what the register map looks like. You can also look at the software drivers provided for the NIOS to see examples of how to properly interact with the UART. It may actually be easier and much less time consuming to just put down an economy core NIOS. Jake- Mark as New
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Thanks for your help. I'll look into it. There are OpenCores available for UART's , maybe I'll have a look at it too and see which option is the best.
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