Intel L-/H-Tile Avalon Streaming for PCI Express IP used as a master (DMA Board --> PC)

[Respoc]

Hi,

I am using the Intel L-/H-Tile Avalon Streaming for PCI Express IP on the Stratix 10 NX chip.

For my application, I developed a DMA in the FPGA that can write data into PC's memory. I was working with Xilinx's FPGA and I want to adapt it on Intel's Stratix.

The Xilinx's IP owns 4 interfaces :
* cq : PC is master and is sending read/write requests.
* cc : link for the FPGA to answer read requests initiated by PC
* rq : FPGA is master and we can initiate read/write requests
* rc : link for the PC to answer read requests initiated by FPGA

From my understanding, Intel's IP has only 2 interfaces : Rx and Tx. It is similar to cq and cc interfaces so PC is master. Is it possible to have the Tx link initiating requests ? I haven't seen anything about this topic in the documentation.

PS : I don't want to use Multi Channel DMA for PCI Express as the IP takes a lot of resources.

[wchiah]

Hi,

Thank you for reaching out.

Just to let you know that Intel has received your support request and I am assigned to work on it.

Allow me some time to look into your issue. I shall come back to you with findings.

Thank you for your patience.

Best regards,

Wincent_Intel

[wchiah]

Hi,

Based on what you mention about tx link initiation request, I suggest you 

If you are not planning to use MCDMA, you can try out AVMM or JESD204 IP at this moment
https://www.intel.com/content/www/us/en/docs/programmable/683758/21-3-19-2-0/fpga-ip-design-example-user-guide.html

1. Can you specific more about what you trying to do ?
2. I am not familiar with Xilinx product and IP, can you tell me which IP from Xilinx that you are looking at as comparison ?

Regards,

Wincent_Intel

[wchiah]

Hi,

I wish to follow up with you about this case.

Do you have any further questions on this matter ?

​​​​​​​Else I would like to have your permission to close this forum ticket

Regards,

Wincent_Intel

[wchiah]

Hi

We have not hear from you and this Case is idling. It is not recommended to idle for too long.

Therefore following our support policy, I have to put this case in close status. My apologies if any inconvenience cause

Hence, This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.

Otherwise, the community users will continue to help you on this thread. Thank you

If you feel your support experience was less than a 9 or 10,

please allow me to correct it before closing or let me know the cause so that I may improve your future support experience.

Regards,

Wincent_Intel