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Interfacing Stratix 10 PMA with custom PCS

HBhat2
New Contributor II
634 Views

Hi,

 

I am planning to develop custom PCS which supports Symbol encoding of 128b/132b and implements Scrambling and RS-FEC of different polynomials compared to existing native PHY IP for L-tile XCVR of Stratix 10. I know that I need to use PCS direct to use only PMA from the L-tile native PHY and the data width supported by PCS direct is 64-bit max. Considering the scenario that after encoding 128b/132b, data width of custom PCS will become 132bit wide. How I map the 132bit encoded data to 64bit PCS direct data width? Also, provide material references / documents/ example designs which guide me to interface a custom PCS to PMA block.

 

With regards,

HPB

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HBhat2
New Contributor II
297 Views

Hi,

I explored further and I understand that Gearbox is used for adapting the encoded data width to PMA data width. I think, in PCS direct mode Transmitter/receiver gearbox will not be enabled. Can anyone guide me to implementing the custom Gearbox for Stratix 10 XCVR PMA?

 

With Regards,

HPB

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CheePin_C_Intel
Employee
297 Views
Hi HPB, As I understand it, you are inquiring about implementing custom gear in S10 device. For your information, your inquiries seems more toward design service related. Generally we would address specific inquiry/problem of the FPGA instead of design related inquiry. Sorry for the inconvenience. Alternatively, you may try to get in touch with our design partners at https://www.intel.com/content/www/us/en/programmable/solutions/partners/design-solutions-network/find-member.html. Please note that there will be charges to the design service. Please let me know if there is any concern. Thank you. Best regards, Chee Pin
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HBhat2
New Contributor II
297 Views

Hi Chee Pin,

 

I meant anybody help me with specific guidelines/documents to implement the gearbox specific to PMA block. Sorry for the miscommunication carried out in the previous reply.

 

With regards,

HPB

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