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Altera_Forum
Honored Contributor I
979 Views

Interrupt Initialization Nios II/e --> Nios II/f

Hi out there! 

 

So i got a Nios2/f License today and ported it into my existing Design. 

But when i flash the NiosII Program onto the FPGA the Processor frezzes. 

I commented the Interrupt init lines out and now it works.  

With the Nios II/e design the Interrupts_Init routines work with the NiosII/f they don´t. 

 

I included the "nios2_gen2_irq.h" and the "alt_irq.h" neither work with the NiosII/f 

 

Here are the Routines: 

 

void init_wiznet_connection_Lost(void) { 

/* Recast the edge_capture pointer to match the alt_irq_register() function 

* prototype. */ 

void* edge_capture_ptr = (void*) &edge_capture_wiznet_link; 

/* Enable first button interrupts. */ 

IOWR_ALTERA_AVALON_PIO_IRQ_MASK(WIZNET_LINK_BASE, 0x1); 

/* Reset the edge capture register. */ 

IOWR_ALTERA_AVALON_PIO_EDGE_CAP(WIZNET_LINK_BASE, 0x0); 

/* Register the interrupt handler. */ 

alt_ic_isr_register(WIZNET_LINK_IRQ_INTERRUPT_CONTROLLER_ID, WIZNET_LINK_IRQ, 

handle_wiznet_connection_Lost, edge_capture_ptr, 0x0); 

 

 

//100 ms TIMER Interrupt initialization 

 

void init_timer_interrupt(void) 

int* ptr; 

IOWR_ALTERA_AVALON_TIMER_CONTROL(TIMER_0_BASE, (1<<3) | (1 << 1) |(1 << 0)); 

IOWR_ALTERA_AVALON_TIMER_STATUS(TIMER_0_BASE,0); // Clear TO Bit(Reaching 0) 

IOWR_ALTERA_AVALON_TIMER_PERIODL(TIMER_0_BASE,(alt_u16)(100000000)); // 1 Sek Interrupt // 100 ms Interrupt 

IOWR_ALTERA_AVALON_TIMER_PERIODH(TIMER_0_BASE,(alt_u16)( (100000000) >> 16 )); // 1 Sek Interrupt 

alt_ic_isr_register(TIMER_0_IRQ_INTERRUPT_CONTROLLER_ID, TIMER_0_IRQ,handle_timer_interrupts, ptr, 0x0); //Register Interrupt 

IOWR_ALTERA_AVALON_TIMER_CONTROL(TIMER_0_BASE,(1<<2) | (1 << 1) | (1 << 0) ); //Start Timer, IRQ enable, Continuous enable 

 

 

//Wiznet initialization 

 

void init_wiznet_interrupts() { 

/* Recast the edge_capture pointer to match the alt_irq_register() function 

* prototype. */ 

void* edge_capture_ptr = (void*) &edge_capture_wiznet; 

/* Enable first button interrupts. */ 

IOWR_ALTERA_AVALON_PIO_IRQ_MASK(WIZNET_NINT_BASE, 0x1); 

/* Reset the edge capture register. */ 

IOWR_ALTERA_AVALON_PIO_EDGE_CAP(WIZNET_NINT_BASE, 0x0); 

/* Register the interrupt handler. */ 

alt_ic_isr_register(WIZNET_NINT_IRQ_INTERRUPT_CONTROLLER_ID, WIZNET_NINT_IRQ, 

handle_wiznet_interrupts, edge_capture_ptr, 0x0); 

 

 

 

Any ideas on that Topic? 

Thank you very much!
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2 Replies
Altera_Forum
Honored Contributor I
62 Views

Check if the IRQ hardware connections are still there in Qsys

Altera_Forum
Honored Contributor I
62 Views

Thank you very much! 

The IRQs were still connected so i simply deleted the Nios II from the Qsys design and implemented it again. 

Now it works. 

 

Thanks again!
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