FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

Is it a bug?

Altera_Forum
Honored Contributor II
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Hi, 

 

We have been using the Altera Checksum block for offloading the TCP Checksum and all appears to function well in 99.9% of packets. However, it would appear that when the checksum should be 0xFEFF. It is always returned as 0xFFFF indicating the result before the final invert is 0. 

 

I hacked the code on the Nios side to detect a zero case and automatically make it a 1 to reflect what appears to be the missing final fold if it has grown beyond a 16bit number. This fixed the issue, and as a result we changed the Verilog to match a different algorithm. 

 

Have we used this block incorrectly and it was just luck it normally works or have we found a legitimate bug? 

 

Cheers 

Tim
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Altera_Forum
Honored Contributor II
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I recommend dumping the packet to a file so that it can be reproduced without any of the networking. If it still fails then I would open a service request.

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