Looking for Cyclone V Triple Speed Ethernet (TSE) SGMII Example Design Files

[TuckerZ]

Hello, 

I am looking for example design files for adapting to SGMII using Intel's Triple Speed Ethernet (TSE) in Cyclone V devices. I was reading Application Note 796 (Section 4.5.1.2.4) where it said to refer to the example design to see an example of adapting the HPS's EMAC to SGMII. The example design is on RocketBoard.  It contains a broken link to the FPGA files (cv_soc_sgmii_ed.tar.gz) of the example design. Does anyone have or know where to find these files? Has this been uploaded somewhere else? Is there someone or someplace else I should ask this question to? I want to specifically see what the SDC file looks like. 

Thank you, 

TuckerZ

[paveetirrasrie_Intel]

Hello Tucker,

Good day.

I'm seeing the similar error and we will raise this to our team. It's an old design so it would take some time to locate the design.

Meanwhile, you may try look into this link, this will guide you on SGMII implementation.

https://www.intel.com/content/www/us/en/docs/programmable/683360/18-0/adapting-to-sgmii.html