- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello,
We have implemented the Modular Scatter Gather DMA Core and are streaming data via the AVST interface with a 4k max transfer length with 128 bit packets and max burst of 16. We are having no issues reading in and processing the data until we go over the max transfer length.
When we reach the maximum transfer length we issue an EOP and then on the next packet issue a SOP. The DMA continues to process data but it misses the packet that comes in with the SOP. It picks up on the next packet and continues normally. I verified in modelsim that the packet is being produced and sent up stream. We implemented a delay of 8 clock cycles (normally packets come at 4 clock cycles) so effectively just waiting one extra packet worth of time. This kind of arbitrary delay fixes the missing data problem.
we would like to understand why we need this delay (haven't experimented too much with adjusting the length of the delay). Is there some status we're unaware of that we should monitor before sending the next stage of data?
(We're using an Arria 10 SoC)
Thanks!!
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
After doing some more testing we see that the delay does not always help. Sometimes we lose one 128 bit payload and sometimes we lose two. It just varies on how much data we're putting across. Some advice would be appreciated!
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
This case is supported and communicated in Intel Premier Support, we will continue the support there.
Thanks.
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page