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Hi
I'm am trying to get a working simulation in modelsim of the ufm on a MAX10 device.
I've written a simple procedure to read and write to the flash, and it work fine on the fpga itself. But so far I have not managed to simulate it correctly in the qurtus/modelsim environment. All my write operations fail and all reads return xxxx.
Cannot find any documentation regarding the correct manner to get the ufm simulated. Can anyone point me in the right direction or provide a quick example of a working simulation workflow?
Also could not find any explanation on how to construct a .dat file to initialize simulated flash.
Thank for the help,
Ariel
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Hi,
May I know if you generate the testbench for the IP? Please refer to https://www.intel.com/content/dam/altera-www/global/ja_JP/pdfs/literature/hb/max-10/ug_m10_ufm.pdf for more information
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Hi, I have generated the test bench, and it partially runs. For example in the simulation if I request a read I do get a response from the ufm, but the output data is always XXX. I know it is partially working because the waitrequest signal is toggled as expected. And when the data is output the readready signal is asserted on time. My problem is that no data can be written to the ufm and any time a try to read from it (in simulation) i get XXX in the output.
This is no matter if I tried to initialize the simulated memory with my own file or used the default setting in intel ip core.
would be glad for any help I can get,
Thanks
Ariel.
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