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5988 Discussions

Modular ADC core Intel FPGA IP ANAIN1 only (pins Channel 1, 2...TSD using as GPIO)

TKapi
Novice
880 Views

Dear,

I want use Modular ADC core Intel FPGA IP. But ANAIN iput only (10M08SAE144I7G). Another ADC pins (Channel 1, 2...TSD) not, this pins are used as GPIO.

Error (176310): Can't place multiple pins assigned to pin location Pin_6 (IOPAD_X10_Y22_N14) Info (176311): Pin PIN_SDRAM_DQ[12] is assigned to pin location Pin_6 (IOPAD_X10_Y22_N14) Info (176311): Pin ~ALTERA_ADC1IN1~ is assigned to pin location Pin_6 (IOPAD_X10_Y22_N14) Error (176310): Can't place multiple pins assigned to pin location Pin_7 (IOPAD_X10_Y22_N21) Error (176310): Can't place multiple pins assigned to pin location Pin_8 (IOPAD_X10_Y21_N14) Error (176310): Can't place multiple pins assigned to pin location Pin_10 (IOPAD_X10_Y21_N21) Error (176310): Can't place multiple pins assigned to pin location Pin_11 (IOPAD_X10_Y20_N14) Error (176310): Can't place multiple pins assigned to pin location Pin_12 (IOPAD_X10_Y20_N21) Error (176310): Can't place multiple pins assigned to pin location Pin_13 (IOPAD_X10_Y19_N14) Error (176310): Can't place multiple pins assigned to pin location Pin_14 (IOPAD_X10_Y19_N21)

Can I using "Modular ADC core Intel FPGA IP", but ADC bank 1A not? Only dedicated ANAIN pin? I use all other pins to GPIO - not have free pins... :-(

 

Thank you, Tomas Kapinusadc.png

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2 Replies
Rahul_S_Intel1
Employee
229 Views
Hi, In Max 10 with part no: 10M08 devices from Intel quartus 14.1 restriction are been places, the package for your device is E144 , if you are ANAIN1 or ANAIN2, the restriction will be applied (page no: 32) that is the reason for the fitter error. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_gpio.pdf Kindly follow the guidelines mentioned above to avoid fitter error. Regards, Rahul
TKapi
Novice
229 Views

Hi,

ok, thank you very much, Rahul, for your answer.

I will modify the future scheme.

 

Tomas

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