I have a FIR filter that occasionally show up in TimeQuest Timing Analysis. The failing path always lies at a 11-bit x 7-bit multiplier where there is a chain of fan-out. I am able to get rid of the timing error from multiple compile but it's just annoying like roll of a dice.
There are still 50+% DSP block remain in the resources, is there a way to tell the tool to perform block/load balancing? There's quite a bit of selection to choose from (auto, DSP blocks, Simple 18-bit multiplier, Simple Multiplier, and etc) while none of them seem to suggest a "load balancing" as described in Timing Optimization technique document (an652 (http://www.altera.com/literature/an/an652.pdf)). I greatly appreciate any experience that you would share!~ Thank you!